1 Introduction

1.1 Camera Link Introduction

Camera Link is a widely used high-speed digital image interface standard in the machine vision industry, maintained by the AIA (Automated Imaging Association). It is mainly designed for industrial cameras, scientific cameras, line-scan cameras, and high-speed acquisition systems, with the following features:

1. Stable transmission link and mature engineering applications;

2. Fixed latency, suitable for high real-time systems;

3. Professional acquisition cards are usually used at the receiving end, facilitating continuous high-bandwidth reception;

4. It is still an important connection method between cameras, acquisition cards, and processing platforms in many industrial projects.

Camera Link is based on LVDS / Channel Link technology at the bottom layer, completing image transmission through fixed clock and parallel data relationships. Unlike Ethernet-based protocols, Camera Link emphasizes deterministic timing, making it very common for link debugging, acquisition card verification, and image processing pipeline testing.

Channel Link consists of a driver and a receiver. The driver receives 28 single-ended data signals and one single-ended clock signal. Data is serialized at 7:1, and four data streams plus one dedicated clock signal are transmitted through five LVDS pairs. The receiver receives four LVDS data streams and the LVDS clock signal, then transmits the 28-bit data and one clock signal to the circuit board.

Camera Link video transmission supports three standard configurations: Base, Medium, and Full.

Base Configuration:

Uses 1 Channel Link chip and 1 Camera Link cable interface. Transmits 28 bits of data per pixel clock cycle, including 24 bits of image data and 4 enable signals. Data throughput is 2.04 Gbit/s.

Medium Configuration:

Uses 2 Channel Link chips and 2 Camera Link cable interfaces. Transmits 52 bits of data per pixel clock cycle, including 48 bits of image data and 4 enable signals. Data throughput is 4.08 Gbit/s.

Full Configuration:

Uses 3 Channel Link chips and 2 Camera Link cable interfaces. Transmits 68 bits of data per pixel clock cycle, including 64 bits of image data and 4 enable signals. Data throughput is 5.44 Gbit/s.

All three configurations use the same 4-bit image enable signals. See the table below for specific configuration parameters and the figure below for single-channel data timing.

Camera Link also defines the following key concepts:

1. Tap Geometry

Describes how the sensor outputs pixels in parallel with multiple taps and regions, e.g., 1X2, 1X4, 1X8.

2. Camera Control (CC1-CC4)

The standard defines 4 control lines for triggering, reset, or custom control.

3. PoCL (Power over Camera Link)

Allows power and data to be carried on the same Camera Link connector system, depending on whether both devices and cables support it.

4. Connector Type

Camera Link commonly uses 26-pin MDR or SDR (MiniCL) connectors. Different manufacturers may use different shapes, but they must comply with standard pin definitions.

For users, the core of using a Camera Link simulator correctly is:

1. Correct pixel format and Tap Geometry;

2. Correct timing parameters and trigger mode;

3. Correct connector connection;

4. Correct receiving-end acquisition card parameters.

1.2 Product Overview

The KU042 Camera Link Image Acquisition Card is a dedicated tool for configuring and capturing images from Camera Link cameras. This device integrates ALINX's KU042 board and our Camera Link sub-card, which can send serial commands to Camera Link cameras via the serial cable integrated on the Camera Link interface for parameter configuration, function operation, or information reading. It transmits image data through other Camera Link interfaces, supporting the development, testing, and verification of image acquisition processes and data processing functions in vision systems.

This device strictly complies with the Camera Link communication protocol standard, fully compatible with Base, Medium, and Full configurations, and supports key data transmission control signals including FVAL and LVAL.

The KU042 hardware is designed by ALINX. We use it for development with the Camera Link sub-card here. For hardware details, refer to official documents such as the AXKU042 Development Board User Manual. Hardware descriptions will focus on the Camera Link sub-card.

1.3 Key Features

Supports Base, Medium, Full modes; direct LVDS-to-FPGA connection, suitable for Camera Link data transmission and other general LVDS connection scenarios

▪ Dimensions: 69mm x 82mm, single-slot LPC FMC connector

▪ Standard SDR26 interface and cables

▪ Supports 5V and 12V external power supply for peripheral expansion

▪ Supports 30 (15 differential pairs) GPIO via 2*18 2.54mm pitch connector for function expansion

▪ Hello-FPGA also provides a Camera Link breakout board, converting MDR26 signals to screw terminals for easy testing

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2 Safety & Compliance

Please read this chapter carefully before installing, operating, or maintaining the KU042 Camera Link Image Acquisition Card. Following these safety guidelines prevents personal injury, equipment damage, or system failure.

2.1 Safety Precautions

• Do NOT plug/unplug the card with power on:
• Turn off the computer and disconnect the power cord before installing/removing the KU042 Camera Link card. Hot-plugging may damage the motherboard, acquisition card, or adapter.

• Do not use the device in high humidity, strong electromagnetic interference, or dusty environments.
• All Internal I/O signals are 3.3V TTL level, directly connected to FPGA IO. Do NOT connect incompatible 5V/12V/24V signals to avoid damaging the FPGA or peripheral circuits.

2.2 ESD Protection Guidelines

The KU040 core board uses high-density FPGA and high-speed interface chips, which are extremely sensitive to electrostatic discharge (ESD). Improper operation may cause permanent device failure.

Pre-operation Preparation

• Operate in a dry environment (relative humidity <60%);
• Use an ESD workbench and wrist strap with reliable grounding;
• Store the board in an anti-static bag (Metal-In Shielding Bag) until installation.

Installation Recommendations

• Remove the board only when ready for installation;
• Hold the board by the edges; avoid touching gold fingers, FPGA, HDBNC interfaces, or I/O pins;
• Keep the host powered off and store in a dry environment if the installed board is unused for a long time.

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3 Product Specifications & Mechanical Information

3.1 Structure & Mechanical Dimensions

• LPC FMC connector, high-density FMC connector compliant with VITA 57.1 standard;
• Camera data (X/Y/Z) is directly connected to FPGA IO via LVDS through the MDR26 interface; CC1~CC4 control signals and SerTC/SerTCG serial signals are converted to single-ended signals via DS90LV031/DS90LV019 and connected to FPGA IO;
• The module provides 12V external power (power depends on FPGA carrier);
• The module provides 5V external power (max power: 5V*2A);
• The module provides VADJ external power (voltage and power depend on FPGA carrier);

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4 Hardware Description

4.1 Hardware Features

▪ The breakout board includes a standard MDR26 interface and 3.81mm pitch screw terminals, connected directly by equal-length differential lines with clear silk-screen labels for easy wiring. Optional 100-ohm differential matching resistors are available for testing.

4.2 FMC Pin Definitions

Pin definitions of the LPC FMC connector are as follows:

This is an FMC LPC connector, with standard definitions below:

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5 Software Description

5.1 Software Overview

To meet different application scenarios and development needs, KU042 provides typical software usage paths covering the full lifecycle from rapid debugging to industrial integration:

• Cameralink Grabber Client: No-code graphical tool for device discovery, parameter configuration, real-time preview, and image capture, suitable for system debugging, on-site verification, and teaching demonstrations;
• Software package includes: Camera link grabber host software;
• Layered architecture from hardware to application:
• Hardware Layer: KU042 cameralink card;
• Driver Layer: Self-developed PCIe driver supporting standard cameralink protocol;
• Application Layer: Specialized Camera Link host software.

5.1.1 Driver Installation

Download the driver package from the official website: ImgGrab-Package-x.x.x.

Download Link: https://img-grab.com/jszc

Double-click the driver installer, click 【Next】 following the wizard, and wait for automatic installation.

Click OK and restart the computer to complete the driver installation.

5.1.2 Verify Driver Installation

Windows Verification Steps:

1. Open Device Manager: Right-click "This PC" → Select "Manage" → Choose "Device Manager" on the left

2. Locate the KU042 Device

   Find the HelloFPGA category and view the "PCIe-4001 Camera Link Frame Grabber" device.

3. Confirm Driver Status

   Normal: Device icon is normal with no yellow exclamation mark/question mark

   Abnormal: Yellow exclamation mark or device not found → Reinstall the driver or restart the computer.

5.2 Host Software

CameraLink Grabber is a Windows/Linux graphical client designed by StarTest Electronics, enabling Camera Link device discovery, parameter configuration, and real-time preview without programming.

5.2.1 Key Functions

Scan and identify connected KU042_Camera Link acquisition cards;

Real-time camera parameter configuration (exposure time, gain, trigger mode, etc.);

Real-time image display;

Serial command frame transmission and reception;

5.2.2 Interface Layout

The client adopts a modular design, with the main interface divided into three functional areas (Figure 5-5) for efficient operation. Functions are as follows:

Area	Area Name	Function Description
1	Basic Camera Configuration	Provides configuration items for Camera Link cameras, such as frame rate, exposure time, resolution, etc.
3	Acquisition Configuration	Displays current frame count; controls start/stop capture; supports image saving and path selection.
4	Image Preview Window	Displays captured images in real time.

5.2.3 Quick Start Guide

The client supports zero-configuration startup. Basic steps for Camera Link image capture:

Launch Software

Double-click the desktop shortcut CameraLink grabber.exe to start the client.

Configure Camera Link Parameters

【1】Required before capture: 1. Set image width/height (max 2048x2048) and Binning (changes output size); 2. Enable local video storage (.raw format) and select save path (fixed after capture starts); 3. Configure pixel format (mono) and tap mode (match hardware); 4. Set CL clock (match camera output frequency).

【2】Optional: Exposure time, frame rate, test pattern, CL mirroring, etc., configurable before/during capture.

【3】Click Start.

5.2.4 Frame Rate Test Example

To verify frame loss when the camera sends images at a fixed frame rate to the acquisition card, use the trigger mode for testing:

We use the FeelTech FY2300 signal generator for this experiment.

First, configure the output frequency and mode of the signal generator:

Set output frequency to 50Hz, amplitude to 5V (TTL level for external trigger). Set trigger pulse mode to Manual and count to 50: one manual trigger sends 50 pulses (1 second total), capturing 50 frames at 50fps. 50 complete saved images = no frame loss.

Connect CH1 (CH2 optional) to the camera's external trigger interface.

Software configuration: Check "Save Image" and select the path before capture. Set trigger source to IO Trigger. Click Start and send a trigger from the signal generator.

Total read frame = 50 after one pulse, confirming 50 complete images are saved. The 50Hz capture has no frame loss.